Three Terminal HTc Vortex Flow Transistors: Optimisation of the Device Geometry Employing Bicrystal Grain-Boundary Josephson Junctions

We have numerically studied the static and dynamic behavior of a three terminal vortex-flow transistor based on a parallel array of Josephson junctions. We explicitly show advantages and disadvantages for different device geometric configurations, systematically changing the symmetry of the bias-current distribution. Using parameters typical of high-temperature superconducting junctions at 77K, we have analysed for each configuration the dependence of the critical current on the control current, and the voltage-current curves. We have calculated gain and transresistance for different bias conditions, and explained the numerical results in terms of the vortex dynamics in the array. This study allows us to establish limits for the operating regime of these devices when used as high-frequency amplifiers.