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Noise Effects in the Design of Analog Circuits Based on CNTFET

Articolo
Data di Pubblicazione:
2022
Abstract:
This paper presents a procedure to analyse the noise effects in the design of analog circuits based on CNTFETs. The noise mechanisms in electronic devices are discussed and the impact of the different noise sources is analysed. After a brief description of the basic structure of device and main noise sources existing in CNTFETs, a static, dynamic and noise analysis is presented. As an example of analog circuit, the proposed procedure is applied to study a basic current mirror and the simulation results allow to determine easily the different noise contribution of every single source. The software used is Advanced Design System (ADS) which is compatible with the Verilog A programming language.
Tipologia CRIS:
01.01 Articolo in rivista
Keywords:
Computer hardware description languages; Timing circuits
Elenco autori:
Marani, Roberto
Autori di Ateneo:
MARANI ROBERTO
Link alla scheda completa:
https://iris.cnr.it/handle/20.500.14243/452302
Pubblicato in:
ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY
Journal
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http://www.scopus.com/record/display.url?eid=2-s2.0-85145651665&origin=inward
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