Data di Pubblicazione:
1988
Abstract:
This paper presents four new arrays for
signed number multiplication and multiplication/
addition. In these structures, it is assumed that the
factors are expressed in 2's complement while the
addend and the result are expressed in redundant
notation. Two arrays operate in a serial-parallel
way, since one of the factors is input in parallel,
while the second factor and the addend (in the
case of multiplication/addition) are entered digit
by digit starting from the most significant. The
other two arrays are fully serial because all the
input numbers are processed digit by digit, starting
with the most signifcant one. In all the arrays
presented the results are produced in a serial
manner from left to right. The arithmetic units
introduced in this paper can be used as basic
blocks of special purpose processors performing
functions such as non-recursive digital filtering,
signal correlation and matrix multiplication. It is
shown that our units achieve the same speed
advantages as other similar units which use
redundant representations for the results, with a
cost equivalent to their counterparts based on full
2's complement representation.
Tipologia CRIS:
01.01 Articolo in rivista
Keywords:
digital multiplication; two's complement; parallel architectures
Elenco autori:
Valenzano, Adriano
Link alla scheda completa:
Pubblicato in: