Progress towards a double flux-locked-loop scheme for SQuID readout of TES detector arrays

Frequency Division Multiplexing technique for reading TES detectors with SQuID devices, requires high loop-gain up to MHz frequency range in the SQuID feedback loop. Such a requirement is difficult to achieve when the feedback loop has a physical length that makes the propagation times of signals not negligible, as in the case in which the readout electronics is placed at room temperature. A novel SQuID readout scheme, called Double Loop-Flux Locked loop (DLFLL), has been proposed earlier. According to this scheme it is possible to make use of a simplified cryogenic electronics, AC coupled, featuring low power dissipation, in order to obtain a cryogenic feedback loop that results in reduced propagation times of signals. The DC and low frequency signals are managed by a standard FLL electronics working at room temperature. Here we present the progress of the integrated Double Loop system. © (2014) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.