A high current drive CMOS output stage with a tunable quiescent current limiting circuit

A CMOS output stage based on a complementary common source with an original quiescent current limiting circuit is presented. The quiescent current can be varied over a wide range by means of a control current with no need to modify the transistor aspect ratios. The output stage has been coupled to a conventional complementary input stage to form a rail-to-rail buffer. A proto-type with the inclusion of auxiliary pins for biasing and current monitoring purposes has been designed using the 1- m double-polysilicon BCD3S process of STMicroelectronics. On a single 5-V power supply, the maximum output current is 20 mA. The ampli-fier, biased for a total power dissipation of 1 mW, exhibits a total harmonic distortion of 58 dB at 1 kHz with 4-V peak-to-peak on a 330- load. Correct operation of the quiescent current limiting circuit has been demonstrated for a minimum supply voltage of 2.2 V.