Low temperature fabrication process for µc-Si / c-Si heterojunctionsolar cells

The optimisation of the fabrication process of ?c-Si/c-Si heterojunction solar cells is discussed, in order to obtain high efficiency / low cost devices. The deposition of the various layers of the device, having p+-i-n-n+ structure, is carried out by Plasma Enhanced Chemical Vapour Deposition (PECVD) at Very High Frequency (VHF), with a process temperature as low as 170 °C. An hydrogen plasma treatment is also used as an alternative to the intrinsic layer for interface passivation. The front contact is obtained by a transparent conducting Indium Tin Oxide (ITO) layer, deposited by RF sputtering at 250°C, with an Al grid on top of it. This grid and the Al back contact are thermally evaporated. Particular attention was put in determining and minimising the contribution of each interface to series resistance. As an example, low temperature processing prevents from applying the standard metal alloying procedures used in silicon based microelectronics for contact fabrication. An alternative low temperature process for the rear contact formation is used, which gives a contact resistance lower than 0.03 Wcm2 . We studied each single interface, including the junction, by electrical characterisation. In this way, the interfaces affecting the series resistance can be identified and improved, and the technology needed for the production of ?c-Si / c-Si heterojunction solar cells can be accurately designed. Details of each process step and results obtained are discussed. An efficiency in excess of 13% was measured on test cells.