Video speed low total voltage matrix addressing technique for SSFLC displays

Novel computed and experimental results are achieved with addressing modes capable of video rate speed with equal selection and data voltages and a commercially available PLC mixtures. Total voltage requirements for integrated circuit drivers is strongly reduced and is now made compatible with existing STN driver technology. A new automatic fit procedure, necessary for fast evaluation of cell parameter and subsequent simulation of cell behavior under matrix addressing, is also described. © 1998 OPA (Overseas Publishers Association) N.V.