Temperature-dependence study of the gate current in SiO2/4H-SiC MOS capacitors

We present a temperature-dependence electrical characterization of the oxide/semiconductor interface in MOS capacitors with a SiO layer deposited on 4H-SiC using dichlorosilane and nitrogen-based vapor precursors. The post deposition annealing process in NO allowed to achieve an interface state density Dit ? 9.0×10cmeV below the conduction band edge. At room temperature, an electron barrier height (conduction band offset) of 2.8 eV was measured using the standard Fowler-Nordheim tunneling model. The electron conduction through the SiO insulating layer was evaluated by studying the experimental temperature dependence of the gate current. In particular, the Fowler-Nordheim electron barrier height showed a negative temperature coefficient (d?/dT = - 0.98 meV/°C), which is very close to the expected value for an ideal SiO/4H-SiC system. This result, obtained for deposited SiO layers, is an improvement compared to the values of the temperature coefficient of the Fowler-Nordheim electron barrier height reported for thermally grown SiO. In fact, the smaller dependence of ? on the temperature observed in this work represents a clear advantage of our deposited SiO for the operation of MOSFET devices at high temperatures.