Enhancement of arithmetic performances in minicomputers: a structural approach

As a consequence of size and cost limitations, the set of arithmetic instructions of minicomputers is usually very poor. Then, computations involving double precision and floating arithmetics are very time consuming. Also, memory occupation of library subroutines performing arithmetic operations is not negligible. In this communication some structural peculiarities will be analized, by which arithmetic performances of minicomputers can be enhanced, whilst usual limitations in complexity and cost are conserved. In particular, advantage of the use of a relatively high number of arithmetic register are discussed and some criteria to determine the optimum number of registers are considered. Besides, an efficient organization of register reference instructions is discussed. Finally, some performances of a minicomputer, into which the above mentioned peculiarities are introduced, will be referred.