Wafer-scale diagnosis tolerating comparator faults

A promising application of comparison-based system-level diagnosis is the testing of VLSI chips during manufacture. However, existing comparison models essentially overlook the test invalidation owing to the physical faults in the comparators. A comparison model is proposed that takes into account faults affecting the comparators and the syndrome generation circuitry. A comparator test session is described that is capable of detecting any combination of stuck-at faults in the diagnostic-circuitry. This test requires units on the wafer to use independent test inputs which can be satisfied at a small wafer design cost.