Data di Pubblicazione:
1999
Abstract:
Statechart diagrams provide a graphical notation for describing dynamic aspects of system behaviour within the Unified Modelling Language (UML). In this paper, we present a branching-time model-checking approach to the automatic verification of the formal correctness of UML Statechart diagram specifications. We use a formal operational semantics for building a labelled transition system (automaton) which is then used as a model to be checked against correctness requirements expressed in Action-Based Temporal Logic (ACTL). Our reference verification environment is JACK, where automata are represented in a standard format, which facilitates the use of different tools for automatic verification
Tipologia CRIS:
04.01 Contributo in Atti di convegno
Keywords:
UML statechart diagrams
Elenco autori:
Gnesi, Stefania; Massink, Mieke; Latella, Diego
Link alla scheda completa:
Titolo del libro:
Fourth IEEE International High-Assurance Systems Engineering Symposium