Determination of hot-carrier induced interface state density in polycrystalline silicon thin-film transistors

Polysilicon thin-film transistors are of great interest for their application in large area microelectronics and especially for their circuit applications. A successful circuit design requires a proper understanding of the electrical characteristics and in the present work some specific aspects related to the hot-carrier induced electrical instabilities are presented. In particular, generation of interface states near the drain junction occurs when the devices are operated for a prolonged time in the so-called kink regime. In the present work we show both experimentally and by numerical simulations how the presence of such interface states affects the electrical characteristics. Furthermore, a novel simple method is proposed to extract, from the analysis of the sheet conductances, the interface state density. The hot-carrier induced interface state density relative to the present devices shows a featureless continuous distribution. Reduction of the generated interface states is observed if trapped holes are annihilated by electron capture. These results suggest that the interface states are induced by the presence of trapped holes, in agreement with similar data reported for c-Si metal-oxide-semiconductor structures.