Design space exploration of parallel embedded architectures for native clifford algebra operations

The design space exploration of parallel embedded architectures that natively support Clifford algebra with different costs, performance and precision is studied. First, the most common applications of geometric algebra have been profiled in order to find the most frequent Clifford algebra operations to be natively supported on the coprocessors. The coprocessor design space has been explored using different design parameters. The parallel execution flow, as well as pipelining techniques, have been chosen for quadruple-based architectures to permit the fastest execution of the most frequent operation. Experimental tests concerned design space exploration, in terms of area cost, relative error, latencies and speedup, of the various implemented architectures based on different sets of architectural parameters, such as the number of multipliers and the coefficient precision. The coprocessor CliffordALU shows an effective 5x average speedup for Clifford products against the same operations in Gaigen-2, a geometric algebra software library generator for general-purpose processors.