Ultra-shallow junction by laser annealing: integration issues and modelling

A revolutionary approach to the technology design is required for the integration of the laser annealing process in nano-electronic device fabrication. The list of the integration issues includes: the patterning effect, the extreme non-equilibrium kinetics of dopant and defects, the material modification due to the melting-regrowth phenomena (in the melting regime) and the residual damage problem. The intense research effort required surely benefits from an adequate development of dedicated technology computer aided design tools. We present the computational apparatus needed for the simulation of the laser annealing process in Si-based devices. The tools aim at the simulation at a different resolution (from the atomic to the continuum level) of the phenomena occurring inside the specimen during the irradiation. The usage impact of such simulation tools on the process integration is conclusively crucial for a reliable device design and the final optimisation of fabricated MOS transistors.