Publication Date:
2016
abstract:
High
-
speed event driven acquisition is normally
performed by ADC boards with a given number of pre and post
trigger samples that are recorded upon the occurrence of a
hardware trigger. A direct physical connection is therefore
required between the source
of event (trigger) and the ADC
because any other software
-
based communication method would
introduce a delay in triggering that would turn out
to be
not
acceptable in many cases.
This paper proposes a solution for the relaxation of the event
communication
time that can be in this case carried out by
software messaging (e.g. via a LAN) provided that the system
components are synchronized in time (e.g. using IEEE 1588
synchronization mechanism). The information about the exact
event occurrence time is contain
ed in the software packet sent to
communicate the event and is used by the ADC FPGA to identify
the exact sample in the ADC sample queue. The length of the
ADC sample queue will depend on the maximum delay in
software event message communication time.
A pr
ototype implementation using a National FlexRIO FPGA
board connected with an ADC device
is
presented as proof of
concept.
Iris type:
04.01 Contributo in Atti di convegno
Keywords:
FlexRIO FPGA
List of contributors: