Nanoscale characterization of interfaces at gate dielectrics on compound semiconductors

This paper presents a nanoscale approach for the characterization of interfaces at gate dielectrics on com-pound semiconductors (SiC and GaN). In particular, scanning capacitance microscopy was used to monitor the electrical modification of SiC under the gate region of MOS devices subjected to different post oxide deposition annealing (PDA) treatments. Thank to this technique, the dopant effects of PDA in N2O or POCl3 atmospheres could be quantified. Secondly, a nanoscale study on the local conduction through thin gate insulator layers (NiO) onto AlGaN/GaN system is presented. This approach used conductive atomic force microscopy (C-AFM).