Electron Traps and Positive DLTS Signals in VPE GaAs MESFETs

Capacitance DLTS measurements have been performed in VPE GaAs MESFETs prepared on Bridgman Cr-doped and LEC undoped semi-insulating substrates. A band of electron traps not intrinsically related to the VPE growth process and accumulating near the metal (gate) -- semiconductor interface was detected in all the samples. Deeper regions into the channel were free from any detectable trap. Near pinch-off conditions, a positive capacitance signal was found to dominate the DLTS spectra only in the case of samples prepared on Cr-doped substrates. The hypothesis of this positive transient being related to changes in the occupation of surface states in the ungated surface access regions has been checked by comparing experimental and calculated dependencies of the signal amplitude on reverse gate voltage. Unexplained discrepancies, together with the absence of positive signal in MESFETs prepared on LEC undoped substrates, suggest the possibility of hole emission from hole traps within the bulk of the device.