83-ps Timing Jitter With a Red-Enhanced SPAD and a Fully Integrated Front End Circuit

In this letter, we present the timing performance of an optimized red-enhanced single-photon avalanche diode (RE-SPAD) manufactured with a fully custom fabrication process. The detector has been characterized with an external CMOS front end circuit able to read out the RE-SPAD avalanche current and provide the timing information with state-of-the-art jitter. In particular, the careful minimization of the RE-SPAD capacitive parasitics, along with the transimpedance architecture and the gigahertz bandwidth of the front end circuit, allowed the achievement of a timing jitter as low as 83 ps full width at half maximum that increases only up to 103 ps for a detection threshold as high as 600 mV. This feature makes it possible to implement high-threshold detection systems insensitive to the electrical disturbances coming from other SPADs integrated in the same chip, demonstrating that the extension of this work to multichannel systems is feasible.