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Design and FPGA implementation of an all-digital two-quadrant general pulse-width modulator

Conference Paper
Publication Date:
2014
abstract:
This paper proposes an all-digital general pulse-width modulator (ADGPWM) that is an improvement of the general pulse-width modulator (GPWM). The ADGPWM allows overmodulation and negative carrier and reference signals to be managed. The proposed all-digital implementation is suited both to serial/concurrent data processing platforms and to integrated circuit implementation, to realize several control algorithms for switching power converters. The VHDL design of the ADGPWM is synthesized and tested on a board which is based on a commercial field-programmable-gate-Array (FPGA). Several details of the all-digital implementation are discussed thoroughly and experimental results are given in order to assess its validity. © 2014 IEEE.
Iris type:
04.01 Contributo in Atti di convegno
Keywords:
all digital implementation; field programmable gate array (FPGA); general pulse width modulator (GPWM); negative carrier; overmodulation
List of contributors:
Vitale, Gianpaolo; DI PIAZZA, MARIA CARMELA; Luna, Massimiliano
Authors of the University:
DI PIAZZA MARIA CARMELA
LUNA MASSIMILIANO
VITALE GIANPAOLO
Handle:
https://iris.cnr.it/handle/20.500.14243/266861
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