Performance evaluation of a mulimicroprocessor system with cluster organization

An approximate Markov model is developed to analyse a clustered multiprocessor interconnection system for processor memory communication. In the proposed network, processors and memories are grouped into clusters utilising locality of communication. Within any cluster processors communicate with the memories through a small crossbar; a synchronous TDM bus interconnects the different clusters. The performance of this organisation has been evaluated by simulating Markov model. This performance evaluation shows that when the probability of request generation between clusters is low the proposed network is comparable to the fully connected crossbar in throughput, while being less complex in hardware requirements. Design considerations for the network are discussed with a view to its VLSI implementation.